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Computer Science Set-1
Computer Organization and Architecture
62

Computer Organization and Architecture MCQ with Answers

62) A device employing INTA line for device interrupt puts the CALL instruction on the data bus while

INTA is active

HOLD is inactive

READY is active

None of these

Answer is:

INTA is active

Computer Organization and Architecture MCQ with Answers

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Related Computer Organization and Architecture MCQ with Answers

63) Which is the most appropriate match for the items in List I with the items in the List II ?
List I
A. Indirect Addressing
B. Indexed Addressing
C. Base Register Addressing
List II
1. Array implementation
2. Writing relocatable code
3. Passing array as parameter

3 1 2

2 3 1

3 2 1

1 2 3

Answer is:

3 1 2

64) Both the arithmetic logic unit (ALU) and control section of CPU employ special purpose storage locations called

Decoders

Buffers

Demultiplexer

Registers

Answer is:

Registers

65) The differences between PLA and ROM is

PLA is combinational ROM is sequential

PLA economises on the number of minterms

PLA has fixed AND array, ROM has fixed NAND array

None of the above

Answer is:

PLA economises on the number of minterms

66) The control unit of computer

Performs ALU operations on the data

Controls the operation of the output devices

Both (a) and (b)

Directs the other unit of computers

Answer is:

Directs the other unit of computers

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